Authors
Ashish Gautam1, *, Takashi Kohno2
1Graduate School of Engineering, The University of Tokyo, 4-6-1 Komaba, Meguro-ku, Tokyo 153-8505, Japan
2Institute of Industrial Science, The University of Tokyo, 4-6-1 Komaba, Meguro-ku, Tokyo 153-8505, Japan
*Corresponding author. Email: [email protected]
Corresponding Author
Ashish Gautam
Received 1 November 2019, Accepted 20 February 2020, Available Online 15 May 2020.
DOI
https://doi.org/10.2991/jrnal.k.200512.005How to use a DOI?
Keywords
Silicon neuronal networks; synaptic reversal potential; low-power
Abstract
Experimental results of a biomimetic silicon synaptic circuit capable of generating both excitatory and inhibitory postsynaptic currents are presented. The generated synaptic current takes into account its first-order dependence on the instantaneous value of the postsynaptic membrane potential, with the synaptic current being proportional to the difference between a tunable synaptic reversal potential and the membrane potential of the postsynaptic neuron. None of the synaptic circuits proposed to date take this dependence into account over the range of biologically plausible synaptic reversal potentials and membrane potential. Special emphasis has been put on minimizing the static power consumption of the synaptic circuit, a design metric not yet analyzed or reported in most of the contemporary CMOS-based synaptic circuits.
Copyright
© 2020 The Authors. Published by ALife Robotics Corp. Ltd.
Open Access
This is an open access article distributed under the CC BY-NC 4.0 license (http://creativecommons.org/licenses/by-nc/4.0/).